Part No .:
D2764AManufacturer:
IntelDescription:
ICRemark:
new originLast Updated:
2026/01/19
The Intel M2764A is a 5V only, 65,536-bit ultraviolet erasable and electrically programmable readonly memory (EPROM). The M2764A is an advanced version of the M2764 and is fabricated with Intel’s HMOSII-E technology which significantly reduces die size and greatly improves the device’s performance, power consumption, reliability, and producibility. The M2764A also offers reduced power consumption compared to the M2764. The maximum active current is 100 mA while the maximum standby current is only 40 mA. The standby mode lowers power consumption without increasing access time.
data sheet Physical Case/Package PLCC Contact Plating Tin Number of Pins 20 Technical Dual Supply Voltage 15 V High Level Output Current 30 mA Interface Parallel Max Dual Supply Voltage 22 V Max Operating Temperature 85 °C Max Power Dissipation 470 mW Max Supply Current 1 mA Max Supply Voltage 25 V Min Operating Temperature -40 °C Number of Bits 4 Number of Channels 4 Number of Circuits 4 Number of Inputs 4 Number of Outputs 4 On-State Resistance 115 Ω Operating Supply Voltage 5 V Polarity Non-Inverting Supply Type Dual Throw Configuration SPST Turn-Off Delay Time 450 ns Turn-On Delay Time 600 ns Dimensions Height 4.53 mm Length 8.89 mm Width 8.89 mm Compliance Lead Free Contains Lead RoHS Compliant The ADG211A is a monolithic CMOS device comprising four independently selectable switches. They are designed on an enhanced LC2MOS process which gives an increased signal handling capability of ±15 V. These switches also feature high switching speeds and low RON. The ADG211A switches are turned on with a logic low on the appropriate control input. Each switch conducts equally well in both directions when ON and each has an input signal range that extends to the supplies. All switches exhibit break-before-make switching action for use in multiplexer applications. Inherent in the design is low charge injection for minimum transients when switching the digital inputs.
Data sheet Physical Case/Package CDIP Mount Through Hole Number of Pins 20 Technical High Level Output Current -12 mA Logic Function Buffer Low Level Output Current 12 mA Max Operating Temperature 125 °C Max Supply Voltage 5.5 V Min Operating Temperature -55 °C Min Supply Voltage 4.5 V Number of Bits 8 Number of Channels 8 Number of Elements 1 Number of Inputs 8 Number of Outputs 8 Operating Supply Voltage 5 V Output Type TTL Polarity Non-Inverting Propagation Delay 38 ns Turn-On Delay Time 38 ns Compliance Lead Free Contains Lead Radiation Hardening No RoHS Compliant Octal Buffers And Line Drivers With 3-State Outputs 20-CDIP -55 to 125
Data sheet Physical Number of Pins 8 Technical Frequency 15 MHz Max Operating Temperature 85 °C Max Supply Voltage 5.5 V Memory Size 1 Mb Memory Type EEPROM Min Operating Temperature -40 °C Min Supply Voltage 4.5 V Nominal Supply Current 10 mA Compliance Lead Free Contains Lead RoHS Compliant The AT17LV series FPGA Configuration EEPROMs (Configurators) provide an easyto-use, cost-effective configuration memory for Field Programmable Gate Arrays. The AT17LV series device is packaged in the 8-lead LAP, 8-lead PDIP, 8-lead SOIC, 20- lead PLCC, 20-lead SOIC, 44-lead PLCC and 44-lead TQFP, see Table 1-1. The AT17LV series Configurators uses a simple serial-access procedure to configure one or more FPGA devices. The user can select the polarity of the reset function by programming four EEPROM bytes. These devices also support a write-protection mechanism within its programming mode. The AT17LV series configurators can be programmed with industry-standard programmers, Atmel’s ATDH2200E Programming Kit or Atmel’s ATDH2225 ISP Cable.
Data sheet Physical Case/Package VQFN Contact Plating Gold Mount Surface Mount Number of Pins 16 Weight 0.00085 oz Technical Bandwidth 35 MHz High Level Output Current 200 mA Low Level Output Current 200 mA Max Operating Temperature 85 °C Max Supply Current 400 nA Max Supply Voltage 4.3 V Min Operating Temperature -40 °C Min Supply Voltage 1.65 V Number of Channels 4 Number of Inputs 4 Number of Outputs 8 On-State Resistance 450 mΩ Operating Supply Current 15 nA Operating Supply Voltage 3 V Polarity Non-Inverting Supply Type Single Throw Configuration SPDT Turn-Off Delay Time 32 ns Turn-On Delay Time 23 ns Dimensions Height 0.95 mm Length 3.15 mm Width 3.15 mm Compliance Lead Free Lead Free REACH SVHC No SVHC Radiation Hardening No RoHS Compliant The TS3A44159 is a bidirectional 4-channel single pole double-throw (SPDT) analog switch with two control inputs, which is designed to operate from 1.65V to 4.3 V. This device is also known as a 2 channel double-pole double-throw (DPDT) configuration. Itoffers low ON-state resistance and excellent ON-state resistance matching with the break-before-make feature that prevents signal distortion during the transferring of a signal from one channel to another. The device has an excellent total harmonic distortion (THD) performance and consumes very low power. These features make this device suitable for portable audio applications
Data sheet Physical Case/Package SOIC Contact Plating Tin Mount Surface Mount Number of Pins 16 Technical High Level Output Current 30 mA Logic Function Multiplexer Max Dual Supply Voltage 18 V Max Operating Temperature 70 °C Max Power Dissipation 762 mW Max Supply Voltage 36 V Min Dual Supply Voltage 4.5 V Min Operating Temperature 0 °C Min Supply Voltage 4.5 V Number of Channels 1 Number of Circuits 1 On-State Resistance 350 Ω Operating Supply Current 300 µA Operating Supply Voltage 28 V Propagation Delay 250 ns Supply Type Single , Dual Throw Configuration DPST Turn-Off Delay Time 200 ns Turn-On Delay Time 250 ns Dimensions Height 2.35 mm Length 10.5 mm Width 7.6 mm Compliance Lead Free Lead Free REACH SVHC Unknown Radiation Hardening No RoHS Compliant The MAX354/MAX355 fault-protected multiplexers (muxes) use a series N-channel, P-channel, N-channel structure that protects the devices from overvoltage up to 40V beyond the supply rails during power-up, powerdown, and fault conditions. The MAX354/MAX355 also protect sensitive circuit components against voltages near or beyond the normal supplies. The MAX354 single 8-channel mux and the MAX355 dual 4-channel mux protect analog signals while operating from a single 4.5V to 36V supply or ±4.5V to ±18V dual supplies. These muxes have 350Ω on-resistance and can be used for demultiplexing as well as multiplexing. Input leakage current is less than 0.5nA at +25°C and less than 5nA at +85°C. All digital inputs have 0.8V and 2.4V logic thresholds, ensuring both TTL and CMOS logic compatibility without pull-up resistors. Break-before-make operation is guaranteed and power consumption is less than 1.5mW. Applications Data-Acquisition Systems Industrial and Process Control Avionics ATE Equipment Signal Routing Redundant/Backup Systems
Physical Case/Package TSSOP Mount Surface Mount Number of Pins 8 Weight 0.001411 oz Technical Frequency 105 kHz Max Frequency 105 kHz Max Operating Temperature 85 °C Max Supply Current 2.5 mA Max Supply Voltage 13.5 V Min Operating Temperature -40 °C Min Supply Voltage 3 V Nominal Supply Current 2.5 mA Operating Supply Current 1 mA Dimensions Height 1.15 mm Length 3 mm Width 4.4 mm Compliance Lead Free Contains Lead Radiation Hardening No RoHS Compliant Multi-topology Piezoelectric Transformer Controller 8-TSSOP
Data sheet Physical Case/Package SOIC Mount Surface Mount Number of Pins 24 Technical Conversion Rate 15 kS/s Dual Supply Voltage 5 V Interface SPI , Serial Max Dual Supply Voltage 5.25 V Max Operating Temperature 85 °C Min Dual Supply Voltage 4.75 V Min Operating Temperature -40 °C Number of A/D Converters 1 Number of Analog Inputs 1 Number of Bits 20 Number of Channels 1 Number of Converters 1 Number of Elements 1 Polarity Bipolar , Unipolar Resolution 20 b Sampling Rate 15 kS/s Supply Type Dual , Analog , Digital Compliance Lead Free Lead Free Radiation Hardening No RoHS Compliant 20-BIT ANALOG-TO-DIGITAL CONVERTER The DDC101 is a precision, wide dynamic range, charge digitizing A/D converter with 20-bit resolution. Lowlevel current output devices, such as photosensors, can bedirectly connected to its input. The most stringent accuracy requirements of many unipolar output sensor applications occur at low signal levels. To meet this requirement, Burr-Brown developed the adaptive delta odulation architecture of the DDC101 to provide linearly improving noise and linearity errors as the input signal level decreases. The DDC101 combines the functions of current-to-voltage conversion, integration, input programmable gain amplification, A/D conversion, and digital filtering to produce precision, wide dynamic range results. The input signal can be a low level current connected directly into the unit or a voltage connected through a user selected resistor. Although the DDC101 is optimized for unipolar signals, it can also accurately digitize bipolar input signals. The patented delta modulation topology combines charge integration and digitization functions. Oversampling and digital filtering reduce system noise dramatically. Correlated Double Sampling (CDS) captures and eliminates steady state and conversion cycle dependent offset and switching errors that are not eliminated with conventional analog circuits. The DDC101 block diagram is shown below. During conversion, the input signal is collected on the Internal integration capacitance for a user determined integration period. A high precision, autozeroed comparator samples the analog input node. Tracking logic updates the internal high resolution D/A converter at a 2MHz rate to maintain the analog input at virtual ground. A user programmable digital filter oversamples the tracking logic’s output. The digital filter passes a low noise, high resolution digital output to the serial I/O register. The serial outputs of multiple DDC101 units can be easily connected together in series or parallel if desired to minimize interconnections.
Physical Case/Package CDIP Compliance Lead Free Contains Lead RoHS Non-Compliant 2 097 152-Bit Programmable ead-Only Memory 32-CDIP 0 to 70
Data sheet Physical Case/Package CDIP Contact Plating Tin , Lead Mount Through Hole Number of Pins 14 Technical Clock Edge Trigger Type Positive Edge Frequency 24 MHz High Level Output Current -4.2 mA Logic Function D-Type Low Level Output Current 4.2 mA Max Frequency 24 MHz Max Operating Temperature 125 °C Max Supply Voltage 18 V Min Operating Temperature -55 °C Min Supply Voltage 3 V Number of Bits 2 Number of Elements 2 Number of Outputs 4 Polarity Non-Inverting Propagation Delay 400 ns Quiescent Current 20 µA Turn-On Delay Time 400 ns Compliance Lead Free Contains Lead Radiation Hardening No RoHS Compliant The CD4013B device consists of two identical,independent data-type flip-flops. Each flip-flop has independent data, set, reset, and clock inputs and Q and Q outputs. These devices can be used for shift register applications, and, by connecting Q output to the data input, for counter and toggle applications. The logic level present at the D input is transferred to the Q output during the positive-going transition of the clock pulse. Setting or resetting is independent of the clock and is accomplished by a high level on the set or reset line, respectively. The CD4013B types are supplied in 14-pin dual-inline plastic packages (E suffix), 14-pin small-outline packages (M, MT, M96, and NSR suffixes), and 14-pin thin shrink small-outline packages (PW and PWR suffixes).
